The present invention relates generally to semiconductor device processing and, more particularly, to a self-supporting, multilevel air bridge interconnect structure having a low dielectric constant.
In the fabrication of integrated circuit devices, it is often desirable to isolate individual components of the integrated circuits from one another with insulative materials. Such insulative materials may include, for example, silicon dioxide, silicon nitride and silicon carbide. While these materials may have acceptable insulating properties in many applications, they also have relatively high dielectric constants, (e.g., xcexa≈4, xcexa≈7, xcexa≈12, respectively) which can lead to capacitive coupling between proximate conductive elements. This is particularly disadvantageous, given the ever-decreasing distances between conductive circuit elements, and the use of multi-layered structures. An unnecessary capacitive coupling between adjacent wires increases the RC time delay of a signal propagated therethrough, resulting in decreased device performance. Thus, for specific applications, insulating materials having relatively low dielectric constants (e.g., xcexa less than 3) may be desired.
It is well known that air has a dielectric constant of about 1.0. While it is true that air has a very low dielectric constant, it is equally true that there are significant difficulties associated with constructing multilevel interconnect structures (e.g., dual damascene structures) utilizing air as a dielectric. Primarily, the task of providing adequate mechanical support for stacked metallization layers during the fabrication thereof, when air is used as the entire dielectric material, is quite daunting. As a result, the conventional processes for fabricating multilayered structures with air dielectrics have either been prohibitively expensive, have lacked adequate mechanical support, or have relied on excessive residual dielectric material.
The foregoing discussed drawbacks and deficiencies of the prior art are overcome or alleviated by a method for forming a multilevel interconnect structure for an integrated circuit. In an exemplary embodiment of the invention, the method includes forming a starting structure upon a substrate, the starting structure having a number of metallic conducting lines contained therein. A disk is bonded to the top of the starting structure, the disk including a plurality of mesh openings contained therein. The mesh openings are then filled with an insulative material, thereby forming a cap upon the starting structure, wherein the cap may structurally support additional interconnect layers subsequently formed thereatop.
In an alternative embodiment, the top of the starting structure is immersed in a liquid bath. The liquid bath is then cured into a solid surface, thereby forming a cap upon the starting structure. The cap may then structurally support additional interconnect layers subsequently formed thereatop. In still an alternative embodiment, a disk is bonded to the top of the starting structure, the disk including a plurality of mesh openings contained therein. The top of the starting structure, including the disk, is then immersed in a liquid bath. The liquid bath is cured into a solid surface, thereby filling the mesh openings with an insulative material and forming a cap upon the starting structure. The cap may then structurally support additional interconnect layers subsequently formed thereatop.